Shift right arithmetic implemented into ALU

This commit is contained in:
WilliamMiceli
2019-03-12 11:17:03 -04:00
parent fe1abc30c5
commit 97433c3691
2 changed files with 48 additions and 1 deletions

View File

@@ -45,7 +45,17 @@ module ALU(
.A(operand0),
.B(result_G));
// H (0111) - Shift Right Arithmetic
shift_right_arithmetic sra(
.A(operand0),
.B(result_H));
// I (1000)
// J (1001)
// K (1010)
// L (1011)
// M (1100)
// N (1101)
// O (1110)
// P (1111)
// MUX chooses which result to show based on the ALU's opcode
mux_16_1 mux0(

View File

@@ -847,6 +847,43 @@ module shift_right_logical_tb();
end
endmodule
module shift_right_arithmetic(
input wire [8:0] A,
output wire [8:0] B);
assign B = {A[8],A[8:1]};
endmodule
//testbench
module shift_right_arithmetic_tb();
reg [8:0] a;
wire [8:0] b;
shift_right_arithmetic tb0(
.A(a),
.B(b));
initial begin
a = 9'b000000000;
#5
a = 9'b000000001;
#5
a = 9'b000111000;
#5
a = 9'b010101010;
#5
a = 9'b101010101;
#5
a = 9'b111111111;
#5
a = 9'b100000001;
#5
$finish;
end
endmodule
module sub_9bit(
input wire [8:0] A,
input wire [8:0] B,