Aded list of things to fix
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# ECE 3570 Lab
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## Unknown Status of Fixes
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## Things to fix
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* Only two registers are being written to, first two within simulation is not being written to
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* Make RAM write edge-triggered only
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* RTL_RAM is what it needs to be showing as, since VIvado will recognize it as such
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* Make ROM asyncronous (can be read at any time)
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* RTL_ROM is what it needs to be showing as, since VIvado will recognize it as such
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* Get rid of if statememnts in RAM and ROM
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* Get programs working properly
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