Updated README

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WilliamMiceli
2019-03-12 21:53:50 -04:00
parent a9a4e81c6c
commit dbdfc2cfc6

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# ECE 3570 Lab
## Fixes To Be Implemented
## Unknown Status of Fixes
* Get rid of the double zero for the enable on the registers
* Make decoder for it
* Redo simulations with other registers using internal signals
* Fix simulation waveforms for Registers, as we are currently changing inputs too quickly (multiple times within a clock cycle)
* Only two registers are being written to, first two within simulation is not being written to
* Need to allow for signed numbers
* Remove subtraction from ALU
* Have arithmetic shift left and right
* <strike>Uncomment all testbenches</strike> (We can have multiple testbenches active at once)
* Bitwise operations do not need a 1-bit implementation, modify 9-bit and keep it only
* Comparator needed
* Make subtraction more efficient
* Need to verify that FetchUnit is working properly as Martin had some concerns that it probably wasn't functioning properly
* Only two registers are being written to, first two within simulation is not being written to