Minor changes to CPU

2019-03-16 14:55:37 -04:00
parent fa5caec5dd
commit e8554a5a9a
3 changed files with 4 additions and 4 deletions
--- a/lab2CA.srcs/sources_1/new/CPU9bits.v
+++ b/lab2CA.srcs/sources_1/new/CPU9bits.v
@@ -20,7 +20,7 @@ module CPU9bits(
        .clk(clk),
        .writeEnable(loadS),
        .writeData(op0),
-        .address(AluOut),
+        .address(op1),
        .readData(dataMemOut)
        );