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WMU-ECE-3570-Lab/lab2CA.srcs/sources_1/new
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jose.rodriguezlabra b53fe3b674 Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2 
# Conflicts:
#	CPU9bits_tb_behav.wcfg
#	lab2CA.srcs/sources_1/new/CPU9bits.v
#	lab2CA.srcs/sources_1/new/instructionMemory.v
#	lab2CA.xpr
2019-04-12 00:04:12 -04:00
..
ALU.v
Fixed unconnected wires
2019-03-29 17:21:29 -04:00
BasicModules.v
Tweaked forwarding check. Program 3 works with a few stalls
2019-04-12 00:01:27 -04:00
ControlUnit.v
Added stuff to waveform configuration
2019-04-11 19:57:38 -04:00
CPU9bits.v
Tweaked forwarding check. Program 3 works with a few stalls
2019-04-12 00:01:27 -04:00
CPU9bitsRemastered.v
Added Pipeline
2019-04-06 17:51:44 -04:00
dataMemory.v
Tweaked forwarding check. Program 3 works with a few stalls
2019-04-12 00:01:27 -04:00
EMModule.v
metadat
2019-04-12 00:02:54 -04:00
FDModule.v
Tweaked forwarding check. Program 3 works with a few stalls
2019-04-12 00:01:27 -04:00
FetchUnit.v
Minor adjustments
2019-04-10 12:52:42 -04:00
instructionMemory.v
Tweaked forwarding check. Program 3 works with a few stalls
2019-04-12 00:01:27 -04:00
RegFile.v
Added Pipeline
2019-04-06 17:51:44 -04:00
wModule.v
Added Pipeline
2019-04-06 17:51:44 -04:00
WMUdule.v
metadat
2019-04-12 00:02:54 -04:00