William/WMU-ECE-3570-Lab
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WMU-ECE-3570-Lab/lab2CA.sim/sim_1/behav/xsim/slt_tb.tcl
Johannes 3f01492398 Added SLT 
There is a testbench but when I try to run it on my computer it brings up some regFile simulation even though SLT is set to top. Not sure if its my pc or the code
2019-03-12 19:49:46 -04:00

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