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It is not fully tested, but it looks pretty good
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README.md

ECE 3570 Lab

Unknown Status of Fixes

  • Only two registers are being written to, first two within simulation is not being written to
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Description
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Readme 5.2 MiB
Languages
C 33.3%
Verilog 26.9%
PureBasic 23.7%
Tcl 16.1%