jose.rodriguezlabra
42d2bf2d80
Fixed pip enables, fixed Nop/Halt
2019-04-11 17:32:17 -04:00
WilliamMiceli
b1f1a7339b
Minor adjustments
2019-04-10 12:52:42 -04:00
WilliamMiceli
4aad1aaaf7
Indented better
2019-04-06 16:06:49 -04:00
WilliamMiceli
71c6c2ad55
Fixed indentations
2019-03-29 17:28:50 -04:00
WilliamMiceli
12700ed019
Simplified and removed latches
2019-03-29 17:22:32 -04:00
WilliamMiceli
93469aa23f
Reordered case statement by opcode and improved comment labels
2019-03-29 16:17:27 -04:00
Johannes
ace0eca65a
Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2
...
# Conflicts:
# lab2CA.xpr
2019-03-24 16:06:29 -04:00
Johannes
e8ada91e08
BEQ and LD fix
2019-03-24 16:05:16 -04:00
jose.rodriguezlabra
ce2410e26c
little things
2019-03-24 16:04:55 -04:00
jose.rodriguezlabra
94f0267a13
stuff
2019-03-24 14:16:03 -04:00
jose.rodriguezlabra
bab680ea27
Added bank to CPU9bits
2019-03-24 12:11:12 -04:00
WilliamMiceli
ad6765a43a
BEQ Opcode fix & other stuffz
2019-03-22 19:54:06 -04:00
jose.rodriguezlabra
3c8147641f
Added zeroing instr
2019-03-16 14:34:36 -04:00
jose.rodriguezlabra
5cbe490aae
Added link instruction
2019-03-16 14:01:32 -04:00
jose.rodriguezlabra
11a1d99e92
Computer works (kinda)
2019-03-13 12:51:44 -04:00
jose.rodriguezlabra
026eb65861
Fixed bugs, finished BEQ, Added Halt
2019-03-13 11:14:52 -04:00
Johannes
a9a4e81c6c
Removed my behavioral slt
2019-03-12 21:33:24 -04:00
Johannes
cb91f6656a
Many Changes
...
I added a comparator, I updated the control unit so that it now uses the 4 bit ALU opcode instead of the 3 bit from before. I added testbenches to the control unit and the slt and comparator modules. However, like before I unable to run the simulation on my desktop. Finally, i added the program code for the equation solver as a test bench in the CPU9bit module
2019-03-12 21:14:27 -04:00
Johannes
460fc3e4ed
CPU
...
LOTS
2019-03-10 16:32:25 -04:00
