jose.rodriguezlabra
8a903ebcfd
Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2
...
# Conflicts:
# regFile_tb_behav.wcfg
2019-03-10 13:00:12 -04:00
jose.rodriguezlabra
4c19de70bc
Metadatapush
2019-03-10 12:59:09 -04:00
goochey
c047c801aa
Lots of changes
...
Added a decoder and implemented it into the regFile. We probably want to change the testbench so that there arent many changes in one clock cycle. Altered the register file so that it only has the one bit enable decided by the decoder and updated the regFile and fetchUnit to reflect this. Went over the fetch unit with Martin, he said it is okay.
2019-02-27 12:06:17 -05:00
WilliamMiceli
6900e74405
Miscellaneous
2019-02-21 15:09:00 -05:00
goochey
9ba63880bd
Fetch-Top
2019-02-20 11:40:43 -05:00
goochey
6550b48599
fetch unit test
2019-02-20 11:31:25 -05:00
goochey
54cccd419f
Lots
...
Lots
2019-02-16 17:40:18 -05:00
goochey
faf9f883dd
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
jose.rodriguezlabra
84e3725fdb
new thing
2019-02-16 13:04:06 -05:00
jose.rodriguezlabra
0d9cc2b890
Erased weird numbers
2019-02-16 12:50:02 -05:00
jose.rodriguezlabra
bb578e7264
Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2
...
# Conflicts:
# lab2CA.cache/wt/webtalk_pa.xml
# lab2CA.runs/.jobs/vrs_config_1.xml
# lab2CA.runs/.jobs/vrs_config_2.xml
# lab2CA.srcs/sources_1/new/BasicModules.v
2019-02-16 12:33:12 -05:00
WilliamMiceli
d1aa8e4ffb
Added outputs to the MUXes for the registers
2019-02-15 17:01:43 -05:00
jose.rodriguezlabra
0b358a6c41
Set some comments
2019-02-15 12:38:07 -05:00
