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3f01492398a48acddd7bed9bc49b964142d90ee3
WMU-ECE-3570-Lab/lab2CA.sim/sim_1/behav/xsim
History
Johannes 3f01492398 Added SLT 
There is a testbench but when I try to run it on my computer it brings up some regFile simulation even though SLT is set to top. Not sure if its my pc or the code
2019-03-12 19:49:46 -04:00
..
xsim.dir
Added SLT
2019-03-12 19:49:46 -04:00
add1bit_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
add1bit_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
add9bit_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
add9bit_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
alu_tb_vlog.prj
Lots
2019-02-16 17:40:18 -05:00
alu_tb.tcl
Lots
2019-02-16 17:40:18 -05:00
ALU_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
ALU.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
and1bit_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
and1bit_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
and9bit_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
and9bit_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
decoder_tb_vlog.prj
Lots of changes
2019-02-27 12:06:17 -05:00
decoder_tb.tcl
Lots of changes
2019-02-27 12:06:17 -05:00
fetchUnit_tb_vlog.prj
fetch unit test
2019-02-20 11:31:25 -05:00
fetchUnit_tb.tcl
fetch unit test
2019-02-20 11:31:25 -05:00
glbl.v
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
mux_2_1_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
mux_2_1_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
mux_4_1_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
mux_4_1_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
mux_8_1_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
mux_8_1_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
nor_1bit_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
nor_1bit_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
nor_9bit_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
nor_9bit_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
not_1bit_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
not_1bit_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
not_9bit_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
not_9bit_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
or_1bit_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
or_1bit_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
or_9bit_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
or_9bit_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
regFile_tb_vlog.prj
Lots
2019-02-16 17:40:18 -05:00
regFile_tb.tcl
Lots
2019-02-16 17:40:18 -05:00
register_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
register_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
shift_logical_left_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
shift_logical_left_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
shift_logical_right_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
shift_logical_right_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
slt_tb_vlog.prj
Added SLT
2019-03-12 19:49:46 -04:00
slt_tb.tcl
Added SLT
2019-03-12 19:49:46 -04:00
sub_9bit_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
sub_9bit_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
twos_compliment_tb_vlog.prj
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
twos_compliment_tb.tcl
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
webtalk_1408.backup.jou
Lots of changes
2019-02-27 12:06:17 -05:00
webtalk_4236.backup.jou
Added SLT
2019-03-12 19:49:46 -04:00
webtalk_10344.backup.jou
Metadatapush
2019-03-10 12:59:09 -04:00
webtalk_14864.backup.jou
Lots of changes
2019-02-27 12:06:17 -05:00
webtalk_16620.backup.jou
Miscellaneous
2019-02-21 15:09:00 -05:00
webtalk.jou
Added SLT
2019-03-12 19:49:46 -04:00
xelab.pb
Added SLT
2019-03-12 19:49:46 -04:00
xvlog.pb
Added SLT
2019-03-12 19:49:46 -04:00