William/WMU-ECE-3570-Lab
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Author SHA1 Message Date
WilliamMiceli 9ac8963fb0 ALU now fully has 4-bit opcode 2019-03-12 11:12:21 -04:00
WilliamMiceli 1c5e79c1ec Made 16:1 MUX for ALU's 4-bit opcode 2019-03-12 11:08:22 -04:00
WilliamMiceli 9d759edbec ALU now has 4 bits of it's own opcode 2019-03-12 11:07:50 -04:00
WilliamMiceli 9e9ff7935b Renamed shifting for incoming shift_right_arithmetic 2019-03-12 10:54:45 -04:00
WilliamMiceli f3ea596086 Simplified bitwise OR 2019-03-12 10:48:50 -04:00
WilliamMiceli e01d639fa0 Simplified bitwise NOT 2019-03-12 10:47:25 -04:00
WilliamMiceli a555728a48 Simplified bitwise NOR 2019-03-12 10:46:08 -04:00
WilliamMiceli 9519460187 AND is bitwise, so simplified, removing 1-bit modules 2019-03-12 10:43:16 -04:00
WilliamMiceli 0104b0e689 Possible mistake 2019-02-25 13:30:58 -05:00
WilliamMiceli 39b9ea781e Removed MUX 16:1 as it's not needed 2019-02-25 13:28:28 -05:00
WilliamMiceli 1734d58b47 Adjusted indentation of testbench code 2019-02-25 13:27:22 -05:00
WilliamMiceli 7c83a77713 Activated all testbenches 2019-02-25 12:51:34 -05:00
WilliamMiceli cb30ee7e0a Added list of fixes and things we need to do/implement 2019-02-21 15:11:35 -05:00
WilliamMiceli f9970dec06 Excluded Markdown files 2019-02-21 15:11:10 -05:00
WilliamMiceli 6900e74405 Miscellaneous 2019-02-21 15:09:00 -05:00