Johannes
cb91f6656a
Many Changes
...
I added a comparator, I updated the control unit so that it now uses the 4 bit ALU opcode instead of the 3 bit from before. I added testbenches to the control unit and the slt and comparator modules. However, like before I unable to run the simulation on my desktop. Finally, i added the program code for the equation solver as a test bench in the CPU9bit module
2019-03-12 21:14:27 -04:00
WilliamMiceli
4a462752e9
Include NOT in the ALU
2019-03-12 11:23:48 -04:00
WilliamMiceli
97433c3691
Shift right arithmetic implemented into ALU
2019-03-12 11:17:03 -04:00
WilliamMiceli
fe1abc30c5
Fixed ALU testbench to 4-bit
2019-03-12 11:12:39 -04:00
WilliamMiceli
9ac8963fb0
ALU now fully has 4-bit opcode
2019-03-12 11:12:21 -04:00
WilliamMiceli
9d759edbec
ALU now has 4 bits of it's own opcode
2019-03-12 11:07:50 -04:00
WilliamMiceli
9e9ff7935b
Renamed shifting for incoming shift_right_arithmetic
2019-03-12 10:54:45 -04:00
Johannes
460fc3e4ed
CPU
...
LOTS
2019-03-10 16:32:25 -04:00
WilliamMiceli
1734d58b47
Adjusted indentation of testbench code
2019-02-25 13:27:22 -05:00
WilliamMiceli
7c83a77713
Activated all testbenches
2019-02-25 12:51:34 -05:00
goochey
54cccd419f
Lots
...
Lots
2019-02-16 17:40:18 -05:00
goochey
faf9f883dd
Collaborative - Fixes and Testbenches for Basic Modules so far
2019-02-16 16:29:12 -05:00
WilliamMiceli
0b71b05c02
All current arithmetic and logical operations are now implemented
2019-02-15 17:51:05 -05:00
WilliamMiceli
6369170e41
Comments and slight renames
2019-02-15 17:49:12 -05:00
WilliamMiceli
b2dfc05db8
Renamed some things; adder is now implemented in ALU
2019-02-15 17:09:44 -05:00
WilliamMiceli
d6cee0483c
ALU opcode is different from instruction opcode, so reducing to needed operations only
2019-02-15 17:02:54 -05:00
WilliamMiceli
f4c923f60c
Fixed ALU to use the inputs we're actually going to be giving it
2019-02-15 16:19:42 -05:00
WilliamMiceli
365fb5f648
Moved ALU from simulation sources to design sources
2019-02-15 16:15:41 -05:00
