 jose.rodriguezlabra
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42d2bf2d80
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Fixed pip enables, fixed Nop/Halt
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2019-04-11 17:32:17 -04:00 |
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jose.rodriguezlabra
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5a506ba3ab
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Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2
# Conflicts:
# lab2CA.cache/wt/webtalk_pa.xml
# lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl
# lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/xsim.mem
# lab2CA.srcs/sources_1/new/instructionMemory.v
# lab2CA.xpr
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2019-03-24 17:33:42 -04:00 |
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jose.rodriguezlabra
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efbd7b773b
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Binary Search completed
It is not fully tested, but it looks pretty good
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2019-03-24 17:30:27 -04:00 |
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jose.rodriguezlabra
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335280ccd5
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Added Binary Search Code
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2019-03-24 16:35:59 -04:00 |
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jose.rodriguezlabra
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eac5d71dd6
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Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2
# Conflicts:
# lab2CA.cache/wt/webtalk_pa.xml
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2019-03-24 16:05:40 -04:00 |
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jose.rodriguezlabra
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ce2410e26c
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little things
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2019-03-24 16:04:55 -04:00 |
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jose.rodriguezlabra
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27f6d24b88
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Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2
# Conflicts:
# lab2CA.cache/wt/webtalk_pa.xml
# lab2CA.runs/impl_1/gen_run.xml
# lab2CA.runs/synth_1/gen_run.xml
# lab2CA.sim/sim_1/behav/xsim/xelab.pb
# lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl
# lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/xsim.mem
# lab2CA.sim/sim_1/behav/xsim/xvlog.pb
# lab2CA.srcs/sources_1/new/instructionMemory.v
# lab2CA.xpr
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2019-03-24 14:17:59 -04:00 |
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jose.rodriguezlabra
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94f0267a13
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stuff
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2019-03-24 14:16:03 -04:00 |
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jose.rodriguezlabra
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bab680ea27
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Added bank to CPU9bits
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2019-03-24 12:11:12 -04:00 |
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jose.rodriguezlabra
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191ca46f2d
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metadata
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2019-03-24 10:07:28 -04:00 |
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jose.rodriguezlabra
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eeb9c7c318
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Tested zero
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2019-03-16 14:55:11 -04:00 |
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jose.rodriguezlabra
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3c8147641f
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Added zeroing instr
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2019-03-16 14:34:36 -04:00 |
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jose.rodriguezlabra
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dfd8753a62
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Implemented SEs
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2019-03-16 14:09:53 -04:00 |
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jose.rodriguezlabra
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5cbe490aae
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Added link instruction
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2019-03-16 14:01:32 -04:00 |
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jose.rodriguezlabra
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08e3659ba3
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Better Sim
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2019-03-14 14:37:58 -04:00 |
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jose.rodriguezlabra
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11a1d99e92
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Computer works (kinda)
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2019-03-13 12:51:44 -04:00 |
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jose.rodriguezlabra
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026eb65861
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Fixed bugs, finished BEQ, Added Halt
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2019-03-13 11:14:52 -04:00 |
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jose.rodriguezlabra
|
911d8e31cc
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Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2
# Conflicts:
# lab2CA.cache/wt/webtalk_pa.xml
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2019-03-13 09:01:33 -04:00 |
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jose.rodriguezlabra
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f6772daf04
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Worthless metadata
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2019-03-13 09:00:40 -04:00 |
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jose.rodriguezlabra
|
7406cddb64
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case for control unit
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2019-03-10 14:05:21 -04:00 |
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jose.rodriguezlabra
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172238b4e0
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Created CPU9bits file
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2019-03-10 13:42:30 -04:00 |
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jose.rodriguezlabra
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8a903ebcfd
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Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2
# Conflicts:
# regFile_tb_behav.wcfg
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2019-03-10 13:00:12 -04:00 |
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jose.rodriguezlabra
|
4c19de70bc
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Metadatapush
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2019-03-10 12:59:09 -04:00 |
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jose.rodriguezlabra
|
84e3725fdb
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new thing
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2019-02-16 13:04:06 -05:00 |
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jose.rodriguezlabra
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0d9cc2b890
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Erased weird numbers
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2019-02-16 12:50:02 -05:00 |
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jose.rodriguezlabra
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d60aa9d1e8
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more stuff
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2019-02-16 12:42:09 -05:00 |
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jose.rodriguezlabra
|
22bf2728ba
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Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2
# Conflicts:
# lab2CA.cache/wt/webtalk_pa.xml
# lab2CA.srcs/sources_1/new/BasicModules.v
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2019-02-16 12:39:15 -05:00 |
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jose.rodriguezlabra
|
9aa7a5f0b0
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stuff
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2019-02-16 12:37:12 -05:00 |
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jose.rodriguezlabra
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bb578e7264
|
Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2
# Conflicts:
# lab2CA.cache/wt/webtalk_pa.xml
# lab2CA.runs/.jobs/vrs_config_1.xml
# lab2CA.runs/.jobs/vrs_config_2.xml
# lab2CA.srcs/sources_1/new/BasicModules.v
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2019-02-16 12:33:12 -05:00 |
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jose.rodriguezlabra
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0b358a6c41
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Set some comments
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2019-02-15 12:38:07 -05:00 |
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jose.rodriguezlabra
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7aa2cfff2a
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Modularized project; mux, clock, and reg done; Progress on RegFile
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2019-02-15 12:24:26 -05:00 |
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jose.rodriguezlabra
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d147e12073
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Forgot to stage this file
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2019-02-15 11:53:54 -05:00 |
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jose.rodriguezlabra
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3378e5bfd8
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Merge resolve?
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2019-02-15 11:53:29 -05:00 |
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