 WilliamMiceli
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fb8e05e6b4
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Another empty file
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2019-04-12 11:06:30 -04:00 |
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WilliamMiceli
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2e7ef77c16
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Removed empty file
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2019-04-12 11:04:47 -04:00 |
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 jose.rodriguezlabra
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b53fe3b674
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Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2
# Conflicts:
# CPU9bits_tb_behav.wcfg
# lab2CA.srcs/sources_1/new/CPU9bits.v
# lab2CA.srcs/sources_1/new/instructionMemory.v
# lab2CA.xpr
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2019-04-12 00:04:12 -04:00 |
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jose.rodriguezlabra
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bf57055518
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metadat
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2019-04-12 00:02:54 -04:00 |
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jose.rodriguezlabra
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ddf47c7eee
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Tweaked forwarding check. Program 3 works with a few stalls
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2019-04-12 00:01:27 -04:00 |
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WilliamMiceli
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1a73f830a4
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Little stuff
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2019-04-11 21:56:54 -04:00 |
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 Johannes
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15b58e43fb
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Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2
# Conflicts:
# lab2CA.cache/wt/webtalk_pa.xml
# lab2CA.runs/impl_1/gen_run.xml
# lab2CA.sim/sim_1/behav/xsim/xelab.pb
# lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl
# lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/xsim.mem
# lab2CA.sim/sim_1/behav/xsim/xvlog.pb
# lab2CA.srcs/sources_1/new/instructionMemory.v
# lab2CA.xpr
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2019-04-11 21:55:30 -04:00 |
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Johannes
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fa5e1d2739
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Idek what ive changed its been so long
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2019-04-11 21:54:34 -04:00 |
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jose.rodriguezlabra
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0118debfb9
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Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2
# Conflicts:
# CPU9bits_tb_behav.wcfg
# lab2CA.xpr
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2019-04-11 21:14:55 -04:00 |
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jose.rodriguezlabra
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0b4554a844
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Fixed P3 mem and other
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2019-04-11 21:13:57 -04:00 |
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WilliamMiceli
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aa25f8fd0d
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Added stuff to waveform configuration
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2019-04-11 19:57:38 -04:00 |
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Johannes
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a3064a836b
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Nonsense
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2019-04-11 19:23:15 -04:00 |
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Johannes
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bc9c02322c
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Added forwarding
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2019-04-11 18:36:00 -04:00 |
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jose.rodriguezlabra
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42d2bf2d80
|
Fixed pip enables, fixed Nop/Halt
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2019-04-11 17:32:17 -04:00 |
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WilliamMiceli
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b1f1a7339b
|
Minor adjustments
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2019-04-10 12:52:42 -04:00 |
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WilliamMiceli
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a1887d7baf
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Mostly fixed waveform configuration
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2019-04-10 12:52:21 -04:00 |
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WilliamMiceli
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847121e65a
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Not needed
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2019-04-10 12:51:47 -04:00 |
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WilliamMiceli
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f6e59802af
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Jumping is not working properly
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2019-04-10 12:51:30 -04:00 |
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WilliamMiceli
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eaec5f0883
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Vivado stuff
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2019-04-10 12:51:15 -04:00 |
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Johannes
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616dac4d29
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Changes
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2019-04-06 17:54:50 -04:00 |
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Johannes
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e6cb8e536b
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Added Pipeline
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2019-04-06 17:51:44 -04:00 |
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WilliamMiceli
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e937485bd4
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Vivado stuff
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2019-04-06 17:44:26 -04:00 |
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WilliamMiceli
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93d5687a12
|
Stopped Vivado from whinning
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2019-04-06 17:44:08 -04:00 |
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WilliamMiceli
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809bca06bf
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Vivado metadata
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2019-04-06 16:09:17 -04:00 |
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WilliamMiceli
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858c1b8e98
|
Added a lot of points
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2019-04-06 16:09:05 -04:00 |
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WilliamMiceli
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dd7a319e92
|
Better indentation
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2019-04-06 16:08:02 -04:00 |
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WilliamMiceli
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3fb02d18e3
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Added result, found that waiting 50000 ns is not necessary, as there's a button for it
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2019-04-06 16:07:32 -04:00 |
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WilliamMiceli
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4aad1aaaf7
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Indented better
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2019-04-06 16:06:49 -04:00 |
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WilliamMiceli
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b3e2adb097
|
Updated simulation
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2019-04-06 16:05:47 -04:00 |
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WilliamMiceli
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c99ae69213
|
Vivado stuff
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2019-04-06 16:05:24 -04:00 |
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WilliamMiceli
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e79e0cf74d
|
Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2
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2019-04-06 14:19:45 -04:00 |
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WilliamMiceli
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2c2132fb9f
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Vivado metadata
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2019-04-06 14:19:20 -04:00 |
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WilliamMiceli
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7715bb2a9c
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Fixed simulation graphs
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2019-04-06 14:19:10 -04:00 |
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WilliamMiceli
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31f0d8a9fc
|
Enabled Bubble Sort for testing
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2019-04-06 14:18:43 -04:00 |
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WilliamMiceli
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3129880d50
|
Enabled test data for Program 1
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2019-04-06 14:18:18 -04:00 |
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WilliamMiceli
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7c3f8c6da9
|
Condensed a little bit. Maybe we can get the first instruction to work
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2019-04-06 14:17:47 -04:00 |
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WilliamMiceli
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f4b2ddebc1
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Added back enable signals
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2019-04-06 14:17:10 -04:00 |
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WilliamMiceli
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de8740a231
|
Vivado runs/sim
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2019-04-06 14:16:26 -04:00 |
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WilliamMiceli
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b4f855c65b
|
Reverting removing the enable signals to test if that is the issue
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2019-04-06 14:15:51 -04:00 |
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Johannes
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f34b3d4098
|
Update
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2019-04-06 13:16:35 -04:00 |
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Johannes
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2746d6d49c
|
Added pipeline registers
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2019-04-06 13:13:47 -04:00 |
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WilliamMiceli
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443d01eba1
|
Modified sensitivities for result; Vivado metadata
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2019-03-30 15:59:43 -04:00 |
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WilliamMiceli
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ea0111542a
|
Result output of CPU pretty much implemented; not yet tested
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2019-03-29 18:16:45 -04:00 |
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WilliamMiceli
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acf7f9e92b
|
Registers and Banks don't need an enable, should be ignored using MUXes
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2019-03-29 18:10:13 -04:00 |
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WilliamMiceli
|
78f481f724
|
Vivado stuff
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2019-03-29 17:29:24 -04:00 |
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WilliamMiceli
|
71c6c2ad55
|
Fixed indentations
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2019-03-29 17:28:50 -04:00 |
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WilliamMiceli
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2479eefa00
|
Formatted things to look a little nicer
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2019-03-29 17:23:26 -04:00 |
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WilliamMiceli
|
9fe8656d21
|
Increased memory size to get rid of unused address ports warning
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2019-03-29 17:23:00 -04:00 |
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WilliamMiceli
|
12700ed019
|
Simplified and removed latches
|
2019-03-29 17:22:32 -04:00 |
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WilliamMiceli
|
9db4c1253b
|
Fixed unconnected wires/ports
|
2019-03-29 17:22:06 -04:00 |
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